The Battle of Processors

The Battle of Processors

How does the CPU specify one particular instruction? It sends out an address to the memory (by placing the required value on the address bus). This is a binary number – a pattern of bits, each either 0 and 1 – which is put as a pattern of low and high voltages on a set of wires, connecting the CPU to the program memory.
The address bus specifies the memory location upon which the next operation will take place, in this case, where in memory the CPU will find the next instruction. When a word of memory is selected, the CPU sends a control signal to the memory to “read” the value stored at the location, which causes the memory to place the stored pattern of bits on the data bus, where it may be read by the CPU.
The register which stores the address of the next instruction is called the program counter. Usually after each instruction is executed, the program counter increases by one (hence the use of the word counter) so that it contains the address of the next instruction. Hence a program consists primarily of a list of instructions; and the program counter allows the CPU to step through the list, performing one instruction after another. Thus a hidden but implied part of every instruction is change the program counter to contain the address of the next instruction.
To speed operation of the CPU many computers use what is called a “pipeline system”. What this means is that you divide up the operation of an instruction into separate parts, which have to be done one after the other; but you arrange that while one part of one instruction is being done, earlier parts of later instructions are being done. For example, consider a four stage pipeline; if each stage takes 100 nsec, then it takes a total of 400 nsec to completely process an instruction; but actually the throughput of the machine can be one instruction every 100nsec, since four different parts of four different instructions are being done at the same time.
So, while instruction one instruction is being executed, another is requesting the source data, the results of a previous operation are being written back, and another new instruction is being fetched.

RISC and CISC Processors
These acronyms stand for “Reduced Instruction Set Computer” and Complex Instruction Set Computer”. This gives a label to two different philosophies in designing computers. In a RISC processor, there are a fairly small number of fairly simple instructions. Each of these instructions does one simple operation, and at most one source value needs to be fetched from memory. In such a processor, the instructions can execute very rapidly. However, some operations require a whole series of instructions: for example, to multiply two eight bit numbers, there is no single instruction; you need a whole list of instructions.
In a CISC processor, one instruction can do a whole sequence of operations, , for example you can multiply two floating point numbers and add a third (a + b*c) all in one instruction; other processors do even more complex things in one instruction. (N.B. Floating point units always operate over a variable number of clock cycles
Advantages of RISC:
Speed; simple instructions execute faster; if they are carefully chosen, the whole program goes faster. A constant execution rate also simplifies design of a pipeline or cache controller.

a). Simplicity; RISC processors are easier to design and build; and in some ways they are easier to program, since there are fewer instructions to learn.

b).High level languages (like C) often do not use many of the specialised instructions; the instructions of a RISC processor are often designed to make a language like C work efficiently; the designers concentrate on instructions which will make C work fast.
Disadvantages of RISC
a. Each instruction is so simple, therefore programs may need to be longer, because it takes more instructions to do each operation. (Example: if there is no instruction to copy data from one memory location to another; you would have to move it from the memory to a register, and then from the register to the memory using a pair of instructions)

b. Computers using instructions specially tailored for one purpose may be very efficient; some computers are specially designed with complex instructions to efficiently perform particular operations.
Segmented memory can seem confusing at first. What you must remember is that the program op-codes will be fetched from the code segment, while program data variables will be stored in the data and extra segments. Stack operations use registers BP or SP and the stack segment. As we begin writing programs the consequences of these definitions will become clearer. An immediate advantage of having separate data and code segments is that one program can work on several different sets of data. This is done by reloading register DS to point to the new data. Perhaps the greatest advantage of segmented memory is that programs that reference logical addresses only can be loaded and run anywhere in memory. This is because the logical addresses always range from 00000h to 0FFFFh, independent of the code segment base. Such programs are said to be relocatable, meaning that they will run at any location in memory. The requirements for writing relocatable programs are that no references be made to physical addresses, and no changes to the segment registers are allowed.


Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s

%d bloggers like this: